1. Field of the Invention
The invention relates in general to a memory cell and a manufacturing method thereof, and more particularly to a single transistor dynamic random access memory cell and a manufacturing method thereof.
2. Description of the Related Art
Dynamic random access memory (DRAM) has now been widely used in personal computers and various peripheral electronic products or devices including graphic cards, scanners, printers, facsimile machines, and image compressing cards. Recently, in addition to the conventional dynamic random access memory (1T1C-DRAM) composed of transistors and capacitors, a single transistor dynamic random access memory (1T-DRAM) without using any capacitor is further developed. A bit of data is stored when the floating body is carrying charges. With the simplification in the structure of the memory, the storage density per unit area is increased, and the manufacturing process is simplified. As the 1T-DRAM adopts a non-destructive way of reading, the lifespan of the memory is prolonged. Thus, the 1T-DRAM, having great potential, has become an important direction for developing memory devices.
Generally, the 1T-DRAM isolates the floating body among the source area, the drain area, the bottom oxide and the gate oxide by forming a cell on a silicon-on-insulator (SOI) wafer, so that electric charges can be stored. However, along with the advance in the manufacturing process of memory, the dimensions of memory elements are gradually reduced, and the length of the channel between the source area and the drain area of a cell is reduced accordingly. When the length of the channel is reduced to a certain level, short channel effect such as threshold voltage drop, punch through effect or drain induced barrier lowering (DIBL) will occur, affecting the stability in the operation of the memory.